1. Field of the Invention
The present invention relates to semiconductor integrated circuits and in particular to integrated circuits which are programmably configurable or include field programmable elements. This invention also relates to methods for forming such integrated circuits.
2. Discussion of Prior Art
Integrated circuits are manufactured using a sequence of masking steps to form a plurality of transistors, diodes and other active and passive regions in a substrate (typically called a "wafer") of semiconductor material (typically silicon). Insulating layers and interconnect layers are formed over the surface of the wafer to interconnect the transistors, diodes and active and passive regions. As integrated circuits become more complex, with hundreds of thousands if not millions of transistors on each integrated circuit, the dimensions of the active regions formed in the substrate become smaller. As these dimensions become smaller, more devices can be fabricated on a given area of silicon, but the yield (i.e., the number of useful devices obtained at the end of the manufacturing process divided by the largest number of useful devices theoretically possible) drops for many reasons. These reasons include, for example, processing defects (e.g., particulates, film defects and masking defects), errors in mask alignment, and unwanted impurities in the wafer. With certain complex integrated circuits, as many as 20 to 30 masking steps may be employed and as many as 3 or 4 layers of interconnects may be required in order to produce an operative integrated circuit. Each of the masking steps must be carried out correctly and each of the interconnect layers must be formed as intended to obtain a working integrated circuit.
As the sizes of integrated circuits are increased, the yield drops, thereby increasing the costs of the resulting functional integrated circuits. Moreover, as the number of masking steps and interconnect layers increases, the time required to obtain a finished integrated circuit increases because each of the fabrication steps must be carried out sequentially.
Existing field programmable semiconductor devices, such as EPROM, EEPROM, flash memory, programmable logic devices (PLDs), field programmable gate arrays (FPGAs), erasable programmable logic devices (EPLDs), and fuse PROM are manufactured by conventional semiconductor fabrication processes, whereby the devices are fabricated by a plurality of sequential semiconductor processing steps. As previously described, the sequential nature of these processing steps reduces the process yield. Moreover, the field programmable elements used in the field programmable semiconductor devices complicate the overall process as compared to standard semiconductor processes used to make, for example, conventional logic elements such as logic gates. As a result, the process used to manufacture field programmable semiconductor devices is generally more complex, and therefore more costly, than the process used to manufacture conventional logic elements. Furthermore, the technology required to fabricate field programmable elements is often not compatible with the standard technology required to fabricate conventional logic elements. This incompatibility results, at least in part, from the high voltages and/or currents used to program the field programmable elements. As a result, trade-offs must be made in parameters such as design layout, process film thickness and junction depth, for example, in order to allow both the field programmable elements and the logic elements of the field programmable semiconductor devices to be fabricated on the same wafer. The result of these trade-offs is a field programmable semiconductor device which performs more poorly than a device fabricated using separate design rules.
Accordingly, it is desirable to have a method and structure which reduces the manufacturing time associated with the fabrication of an integrated circuit. It is also desirable to have a method and structure which reduces the complexity of the fabrication process required to make complex integrated circuits, particularly field programmable semiconductor devices. It is also desirable to have a method and structure which allows optimal design rules to be utilized in the manufacture of integrated circuits which include both conventional logic elements and field programmable elements.